Digital-GrandTest1-Q13

+2 votes

A 3 bit down counter is used to control the output of multiplexer as shown in the figure. The counter is initially at (101)_2 the output of multiplexer will follow the sequence:


(A). I_2, 0, I_1, 0.....

(B).I_1, 0, I_2, 0.....

(C).I_1, 0, 0, I_2......

(D).I_1, I_1, I_2, 0.....

asked Jun 19 in Digital by gbmentor (14,290 points)
reshown Jun 20 by gbmentor

6 Answers

0 votes
 
Best answer
Answer : Option A

Solution :

When E=0 , Mux is not enabled. Hence Output =0.

When E=1, Corresponding lines are selected.

Now since counter is a down counter starting at (101). Next sequence will be : (100) , (011) , (010) , (011)....so on

For example , when initially counter is 101: Select lines get S0=1, S1=0. Since S1 is msb. Line 1 is selected.

i.e Output will be I2.

Similarly the sequence will be I2,0,I1,0.
answered Jun 21 by gbmentor (14,290 points)
–1 vote
B is correct one
answered Jun 20 by tsnikhilsharmagate2018 (17,270 points)
–1 vote

 

b is correct one.

answered Jun 20 by tsnikhilsharmagate2018 (17,270 points)
How you are deciding whether S0 is MSB and S1 is LSB?
If nothing is given than we always used left hand side man right hand side lsb
NO..S0 is always lsb, S1 is msb. unless said
Okk bro thanks
+1 vote
A is the answer
answered Jun 20 by tskukrejakapil7 (1,800 points)
Answer is A as S0 is lsb S1 as msb
Yes when lsb msb change than answer is b but a is correct because S1S0
MSB LSB
0 votes

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So And is A

answered Jun 20 by alipro20 (160 points)
0 votes

A is correct one in last solution we used S0 as msb but it's not true S1S0 msb LSB so 

A) is correct one 

answered Jun 20 by tsnikhilsharmagate2018 (17,270 points)
Answer:
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