Combinational Circuits - 15 Inverter has propagation delay of , AND, OR gates have  propagation delay.

Initially A = 0, B = 1, C = 0.

For every A,B,C are updated to new values as shown below.

t=5 A = 1,B=1,C=0

t=10 A=1,B=0,C=1

t=15 A=1,B=0,C=0

Output of the circuit at t=25 and t=30 respectively:

A) 1,0
B) 0,1
C) 1,1
D) 0,0

Edit: A,B,C values are not changed after t = 15 nsec asked May 16 in Digital
edited May 17

answer should be A

Reason :-

Both the inputs to AND gate is available only after 5 ns,when NOT gates computes its' value and produces output as 1, and at that time other input is 1,so output of AND gate is produced after 15 ns as 1. Now input to OR gate is 1,and the other input is 0 ( C=0 at 15 ns) ,and final OP appears after 25 ns which is 1.

Now at 30 ns,since the OR gate takes 10 ns,we can look at what was the innput to the OR gate at 20ns, or we can look at 10 ns when the inputs to AND gate is given i,e 0 ,and at 20 ns,one of the input to OR gate is 0,so the other is 0,so at 30 ns it gives 0 answered May 17 by (1,760 points)
plz explain using diagram?/
check my solution it may be helpful for you Same way we can compute x3(25). answered May 17 by (31,410 points)
Is this the standard way of doing such questions? and how you come up with this equation(red marked)?
Just aptitude. As there is a 10 nsec delay, current output your seeing is OR of the input values  of 10 nsec past.
there is a small mistake in the 4th line from last while x2(20) calculation it is And operation so there should be dot(.)
Yes bro .  There not +  The key idea is to find the output as if there is no delay at all then shift right side by that delay,

Now, we can see from the above diagram there is 1 output at 25ns and 1 output at 30ns

So, In this way, we can draw the timing diagram of a circuit. answered Jun 22 by (6,630 points)
Correction: As B is considered as 0 at 10ns, it follows that your Z should be taken as 0 at 30ns.
It is 0 at 30ns please check again @tkandre
**correction at 35 Z gives 1